HAL RCC PLL functions migration

This section provides information about the HAL RCC PLL functions migration.

HAL RCCEx get PLL clock frequency

Function Description

In HAL2, all APIs to retrieve the output PLLx clock frequency are renamed.

HAL1

HAL2

Function name

void HAL_RCCEx_GetPLL1ClockFreq(PLL1_ClocksTypeDef *PLL1_Clocks);

void HAL_RCC_PLL1_GetClockFreq(hal_rcc_pll_output_freq_t *p_clk);

void HAL_RCCEx_GetPLL2ClockFreq(PLL2_ClocksTypeDef *PLL2_Clocks);

void HAL_RCC_PLL2_GetClockFreq(hal_rcc_pll_output_freq_t *p_clk);

void HAL_RCCEx_GetPLL3ClockFreq(PLL3_ClocksTypeDef *PLL3_Clocks);

void HAL_RCC_PLL3_GetClockFreq(hal_rcc_pll_output_freq_t *p_clk);

Example Usage

HAL1

HAL2 

PLL1_ClocksTypeDef pll1_clocks;
PLL2_ClocksTypeDef pll2_clocks;
PLL3_ClocksTypeDef pll3_clocks;

HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
HAL_RCCEx_GetPLL2ClockFreq(&pll2_clocks);
HAL_RCCEx_GetPLL3ClockFreq(&pll3_clocks);

hal_rcc_pll_output_freq_t pll1_clk;
hal_rcc_pll_output_freq_t pll2_clk;
hal_rcc_pll_output_freq_t pll3_clk;

HAL_RCC_PLL1_GetClockFreq(&pll1_clk);
HAL_RCC_PLL2_GetClockFreq(&pll2_clk);
HAL_RCC_PLL3_GetClockFreq(&pll3_clk);

HAL RCCEx enable PLL2

Function Description

In HAL2, all APIs to enable, disable, and configure PLL2 are renamed and restructured.

HAL1

HAL2

Function name

HAL_StatusTypeDef HAL_RCCEx_EnablePLL2(const RCC_PLL2InitTypeDef *PLL2Init);

hal_status_t HAL_RCC_PLL2_SetConfig(const hal_rcc_pll_config_t *p_config);

hal_status_t HAL_RCC_PLL2_EnableOutput(uint32_t output);

hal_status_t HAL_RCC_PLL2_Enable(void);

HAL_StatusTypeDef HAL_RCCEx_DisablePLL2(void);

hal_status_t HAL_RCC_PLL2_Disable(void);

Example Usage

HAL1

HAL2 

RCC_PLL2InitTypeDef pll2_init;
pll2_init.PLL2Source = RCC_PLLSOURCE_MSI;
pll2_init.PLL2M = 1;
pll2_init.PLL2N = 43;
pll2_init.PLL2P = 7;
pll2_init.PLL2Q = 2;
pll2_init.PLL2R = 2;
pll2_init.PLL2RGE = RCC_PLLVCIRANGE_1;
pll2_init.PLL2FRACN = 0;
pll2_init.PLL2ClockOut = RCC_PLL2_DIVP | RCC_PLL2_DIVQ | RCC_PLL2_DIVR;

HAL_RCCEx_EnablePLL2(&pll2_init);

HAL_RCC_MSI_Enable(HAL_RCC_MSIS_FREQ_4MHZ);
hal_rcc_pll_config_t config_pll;
config_pll.pll_source = HAL_RCC_PLL_SRC_MSIS;
config_pll.pll_m = 1;
config_pll.pll_n = 43;
config_pll.pll_p = 7;
config_pll.pll_q = 2;
config_pll.pll_r = 2;
config_pll.pll_fracn = 0;
HAL_RCC_PLL2_SetConfig(&config_pll);
HAL_RCC_PLL2_Enable();
HAL_RCC_PLL2_EnableOutput(HAL_RCC_PLL2_OUTPUT_P
| HAL_RCC_PLL2_OUTPUT_Q | HAL_RCC_PLL2_OUTPUT_R);

HAL RCCEx enable PLL3

Function Description

In HAL2, all APIs to enable, disable, and configure PLL3 are renamed and restructured.

HAL1

HAL2

Function name

HAL_StatusTypeDef HAL_RCCEx_EnablePLL3(const RCC_PLL3InitTypeDef *PLL3Init);

hal_status_t HAL_RCC_PLL3_SetConfig(const hal_rcc_pll_config_t *p_config);

hal_status_t HAL_RCC_PLL3_EnableOutput(uint32_t output);

hal_status_t HAL_RCC_PLL3_Enable(void);

HAL_StatusTypeDef HAL_RCCEx_DisablePLL3(void);

hal_status_t HAL_RCC_PLL3_Disable(void);

Example Usage

HAL1

HAL2 

RCC_PLL3InitTypeDef pll3_init;
pll3_init.PLL3Source = RCC_PLLSOURCE_MSI;
pll3_init.PLL3M = 1;
pll3_init.PLL3N = 43;
pll3_init.PLL3P = 7;
pll3_init.PLL3Q = 2;
pll3_init.PLL3R = 2;
pll3_init.PLL3RGE = RCC_PLLVCIRANGE_1;
pll3_init.PLL3FRACN = 0;
pll3_init.PLL3ClockOut = RCC_PLL3_DIVP | RCC_PLL3_DIVQ | RCC_PLL3_DIVR;

HAL_RCCEx_EnablePLL3(&pll3_init);

HAL_RCC_MSI_Enable(HAL_RCC_MSIS_FREQ_4MHZ);
hal_rcc_pll_config_t config_pll;
config_pll.pll_source = HAL_RCC_PLL_SRC_MSIS;
config_pll.pll_m = 1;
config_pll.pll_n = 43;
config_pll.pll_p = 7;
config_pll.pll_q = 2;
config_pll.pll_r = 2;
config_pll.pll_fracn = 0;
HAL_RCC_PLL3_SetConfig(&config_pll);
HAL_RCC_PLL3_Enable();
HAL_RCC_PLL3_EnableOutput(HAL_RCC_PLL3_OUTPUT_P
| HAL_RCC_PLL3_OUTPUT_Q | HAL_RCC_PLL3_OUTPUT_R);